Dataflow Runtime API  3.0.3.0
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imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR Struct Reference

RCC PLLSAI configuration register (RCC_PLLSAICFGR), chapter 5.3.24 Access: no wait state, word, half-word and byte access. More...

#include <Imt.Base.HAL.STM32F769/Registers/RCCRegisters.h>

Public Attributes

volatile uint32_t: 6
 
volatile uint32_t PLLSAIN: 9
 PLLSAI division factor for VCO. More...
 
volatile uint32_t PLLSAIP: 2
 PLLSAI division factor for 48MHz clock. More...
 
volatile uint32_t PLLSAIQ: 4
 PLLSAI division factor for SAI clock. More...
 
volatile uint32_t PLLSAIR: 3
 PLLSAI division factor for LCD clock. More...
 

Detailed Description

RCC PLLSAI configuration register (RCC_PLLSAICFGR), chapter 5.3.24 Access: no wait state, word, half-word and byte access.

Member Data Documentation

◆ PLLSAIN

volatile uint32_t imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR::PLLSAIN

PLLSAI division factor for VCO.

◆ PLLSAIP

volatile uint32_t imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR::PLLSAIP

PLLSAI division factor for 48MHz clock.

◆ PLLSAIQ

volatile uint32_t imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR::PLLSAIQ

PLLSAI division factor for SAI clock.

◆ PLLSAIR

volatile uint32_t imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR::PLLSAIR

PLLSAI division factor for LCD clock.

◆ uint32_t

volatile imt::base::hal::stm32f769::registers::RCCRegisters::RCC_PLLSAICFGR::uint32_t
  • reserved

The documentation for this struct was generated from the following file: