Dataflow Runtime API  3.1.1.0
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imt::base::hal::stm32h730::peripherals::NVIC Class Reference

Nested vectored interrupt controller (NVIC) peripheral module. More...

#include <Imt.Base.HAL.STM32H730/Peripherals/NVIC.h>

Public Types

enum class  Irq {
  RESET = -15 , NON_MASKABLE_INT = -14 , HARD_FAULT = -13 , MEMORY_MANAGEMENT = -12 ,
  BUS_FAULT = -11 , USAGE_FAULT = -10 , SV_CALL = -5 , DEBUG_MONITOR = -4 ,
  PEND_SV = -2 , SYS_TICK = -1 , WWDG = 0 , PVD = 1 ,
  TAMP_STAMP = 2 , RTC_WKUP = 3 , FLASH = 4 , RCC = 5 ,
  EXTI0 = 6 , EXTI1 = 7 , EXTI2 = 8 , EXTI3 = 9 ,
  EXTI4 = 10 , DMA1_STREAM_0 = 11 , DMA1_STREAM_1 = 12 , DMA1_STREAM_2 = 13 ,
  DMA1_STREAM_3 = 14 , DMA1_STREAM_4 = 15 , DMA1_STREAM_5 = 16 , DMA1_STREAM_6 = 17 ,
  ADC1_2 = 18 , FDCAN1_IT0 = 19 , FDCAN2_IT0 = 20 , FDCAN1_IT1 = 21 ,
  FDCAN2_IT1 = 22 , EXTI9_5 = 23 , TIM1_BRK = 24 , TIM1_UP = 25 ,
  TIM1_TRG_COM = 26 , TIM1_CC = 27 , TIM2 = 28 , TIM3 = 29 ,
  TIM4 = 30 , I2C1_EV = 31 , I2C1_ER = 32 , I2C2_EV = 33 ,
  I2C2_ER = 34 , SPI1 = 35 , SPI2 = 36 , USART1 = 37 ,
  USART2 = 38 , USART3 = 39 , EXTI15_10 = 40 , RTC_ALARM = 41 ,
  TIM8_BRK_TIM12 = 43 , TIM8_UP_TIM13 = 44 , TIM8_TRG_COM_TIM14 = 45 , TIM8_CC = 46 ,
  DMA1_STREAM_7 = 47 , FMC = 48 , SDMMC1 = 49 , TIM5 = 50 ,
  SPI3 = 51 , UART4 = 52 , UART5 = 53 , TIM6_DAC = 54 ,
  TIM7 = 55 , DMA2_STREAM_0 = 56 , DMA2_STREAM_1 = 57 , DMA2_STREAM_2 = 58 ,
  DMA2_STREAM_3 = 59 , DMA2_STREAM_4 = 60 , ETH = 61 , ETH_WKUP = 62 ,
  FDCAN_CAL = 63 , DMA2_STREAM_5 = 68 , DMA2_STREAM_6 = 69 , DMA2_STREAM_7 = 70 ,
  USART6 = 71 , I2C3_EV = 72 , I2C3_ER = 73 , OTG_HS_EP1_OUT = 74 ,
  OTG_HS_EP1_IN = 75 , OTG_HS_WKUP = 76 , OTG_HS = 77 , DCMI_PSSI = 78 ,
  CRYP = 79 , HASH_RNG = 80 , FPU = 81 , UART7 = 82 ,
  UART8 = 83 , SPI4 = 84 , SPI5 = 85 , SPI6 = 86 ,
  SAI1 = 87 , LTDC = 88 , LTDC_ERR = 89 , DMA2D = 90 ,
  OCTOSPI1 = 92 , LP_TIM1 = 93 , CEC = 94 , I2C4_EV = 95 ,
  I2C4_ER = 96 , SPDIF_RX = 97 , DMAMUX1_OV = 102 , DFSDM1_FLT0 = 110 ,
  DFSDM1_FLT1 = 111 , DFSDM1_FLT2 = 112 , DFSDM1_FLT3 = 113 , SWPMI1 = 115 ,
  TIM15 = 116 , TIM16 = 117 , TIM17 = 118 , MDIOS_WKUP = 119 ,
  MDIOS = 120 , MDMA = 122 , SDMMC2 = 124 , HSEM0 = 125 ,
  ADC3 = 127 , DMAMUX2_OVR = 128 , BDMA_CH0 = 129 , BDMA_CH1 = 130 ,
  BDMA_CH2 = 131 , BDMA_CH3 = 132 , BDMA_CH4 = 133 , BDMA_CH5 = 134 ,
  BDMA_CH6 = 135 , BDMA_CH7 = 136 , COMP = 137 , LPTIM2 = 138 ,
  LPTIM3 = 139 , LPTIM4 = 140 , LPTIM5 = 141 , LPUART = 142 ,
  CRS = 144 , ECC_DIAG_IT = 145 , SAI4 = 146 , TEMP_IT = 147 ,
  WKUP = 149 , OCTOSPI2 = 150 , OTFDEC1 = 151 , OTFDEC2 = 152 ,
  FMAC = 153 , CORDIC_IT = 154 , UART9_IT_OR_UART9_WKUP = 155 , USART10 = 156 ,
  I2C5_EV = 157 , I2C5_ER = 158 , FDCAN3_IT0 = 159 , FDCAN3_IT1 = 160 ,
  TIM23 = 161 , TIM24 = 162
}
 STM32H730 Interrupt Number Definition. More...
 
enum class  IrqPriority {
  Priority0 = 0U , Priority1 = 1U , Priority2 = 2U , Priority3 = 3U ,
  Priority4 = 4U , Priority5 = 5U , Priority6 = 6U , Priority7 = 7U ,
  Priority8 = 8U , Priority9 = 9U , Priority10 = 10U , Priority11 = 11U ,
  Priority12 = 12U , Priority13 = 13U , Priority14 = 14U , Priority15 = 15U
}
 STM32H730 has 4 priority bits (=0xF = 16 priorities) More...
 

Static Public Member Functions

static void setPriorityGrouping (const uint32_t group)
 Sets the priority grouping field (preemption priority and subpriority) using the required unlock sequence. More...
 
static void setPriority (const Irq irq, const IrqPriority priority)
 The function sets the priority of an interrupt. More...
 
static void enableIrq (const Irq irq)
 Enables the device-specific interrupt in the NVIC interrupt controller. More...
 
static void disableIrq (const Irq irq)
 Disables the device-specific interrupt in the NVIC interrupt controller. More...
 
static void generateSystemReset (void)
 Generates a system reset. More...
 

Detailed Description

Nested vectored interrupt controller (NVIC) peripheral module.

Reference: ST_CortexM7_STM32H730_TRM_Rev2.pdf Chapter 19.1.2 ARM Cortex-M7 Generic User Guide DUI0646A.pdf Chapter 4.3.8

Member Enumeration Documentation

◆ Irq

enum imt::base::hal::stm32h730::peripherals::NVIC::Irq
strong

STM32H730 Interrupt Number Definition.

Enumerator
RESET 

1 Cortex-M7 Reset Interrupt

NON_MASKABLE_INT 

2 Cortex-M7 Non Maskable Interrupt

HARD_FAULT 

3 Cortex-M7 All class of fault

MEMORY_MANAGEMENT 

4 Cortex-M7 Memory Management Interrupt

BUS_FAULT 

5 Cortex-M7 Bus Fault Interrupt

USAGE_FAULT 

6 Cortex-M7 Usage Fault Interrupt

SV_CALL 

11 Cortex-M7 SV Call Interrupt

DEBUG_MONITOR 

12 Cortex-M7 Debug Monitor Interrupt

PEND_SV 

14 Cortex-M7 Pend SV Interrupt

SYS_TICK 

15 Cortex-M7 System Tick Interrupt

WWDG 

Window WatchDog Interrupt.

PVD 

PVD through EXTI Line detection Interrupt.

TAMP_STAMP 

Tamper and TimeStamp interrupts through the EXTI line.

RTC_WKUP 

RTC Wakeup interrupt through the EXTI line.

FLASH 

FLASH global Interrupt.

RCC 

RCC global Interrupt.

EXTI0 

EXTI Line0 Interrupt.

EXTI1 

EXTI Line1 Interrupt.

EXTI2 

EXTI Line2 Interrupt.

EXTI3 

EXTI Line3 Interrupt.

EXTI4 

EXTI Line4 Interrupt.

DMA1_STREAM_0 

DMA1 Stream 0 global Interrupt.

DMA1_STREAM_1 

DMA1 Stream 1 global Interrupt.

DMA1_STREAM_2 

DMA1 Stream 2 global Interrupt.

DMA1_STREAM_3 

DMA1 Stream 3 global Interrupt.

DMA1_STREAM_4 

DMA1 Stream 4 global Interrupt.

DMA1_STREAM_5 

DMA1 Stream 5 global Interrupt.

DMA1_STREAM_6 

DMA1 Stream 6 global Interrupt.

ADC1_2 

ADC1 and ADC2 global Interrupts.

FDCAN1_IT0 

FDCAN1 interrupt line 0.

FDCAN2_IT0 

FDCAN2 interrupt line 0.

FDCAN1_IT1 

FDCAN1 interrupt line 1.

FDCAN2_IT1 

FDCAN2 interrupt line 1.

EXTI9_5 

EXTI Line5 to Line9 Interrupt.

TIM1_BRK 

TIM1 Break interrupt.

TIM1_UP 

TIM1 Update Interrupt.

TIM1_TRG_COM 

TIM1 Trigger and Commutation Interrupt.

TIM1_CC 

TIM1 Capture Compare Interrupt.

TIM2 

TIM2 global Interrupt.

TIM3 

TIM3 global Interrupt.

TIM4 

TIM4 global Interrupt.

I2C1_EV 

I2C1 Event Interrupt.

I2C1_ER 

I2C1 Error Interrupt.

I2C2_EV 

I2C2 Event Interrupt.

I2C2_ER 

I2C2 Error Interrupt.

SPI1 

SPI1 global Interrupt.

SPI2 

SPI2 global Interrupt.

USART1 

USART1 global Interrupt.

USART2 

USART2 global Interrupt.

USART3 

USART3 global Interrupt.

EXTI15_10 

External Line[15:10] Interrupts.

RTC_ALARM 

RTC Alarm (A and B) through EXTI Line Interrupt.

TIM8_BRK_TIM12 

TIM8 Break Interrupt and TIM12 global interrupt.

TIM8_UP_TIM13 

TIM8 Update Interrupt and TIM13 global interrupt.

TIM8_TRG_COM_TIM14 

TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt.

TIM8_CC 

TIM8 Capture Compare Interrupt.

DMA1_STREAM_7 

DMA1 Stream7 Interrupt.

FMC 

FMC global Interrupt.

SDMMC1 

SDMMC1 global Interrupt.

TIM5 

TIM5 global Interrupt.

SPI3 

SPI3 global Interrupt.

UART4 

UART4 global Interrupt.

UART5 

UART5 global Interrupt.

TIM6_DAC 

TIM6 global and DAC1&2 underrun error interrupts.

TIM7 

TIM7 global interrupt.

DMA2_STREAM_0 

DMA2 Stream 0 global Interrupt.

DMA2_STREAM_1 

DMA2 Stream 1 global Interrupt.

DMA2_STREAM_2 

DMA2 Stream 2 global Interrupt.

DMA2_STREAM_3 

DMA2 Stream 3 global Interrupt.

DMA2_STREAM_4 

DMA2 Stream 4 global Interrupt.

ETH 

Ethernet global Interrupt.

ETH_WKUP 

Ethernet Wakeup through EXTI line Interrupt.

FDCAN_CAL 

FDCAN calibration interrupt.

DMA2_STREAM_5 

DMA2 Stream 5 global interrupt.

DMA2_STREAM_6 

DMA2 Stream 6 global interrupt.

DMA2_STREAM_7 

DMA2 Stream 7 global interrupt.

USART6 

USART6 global interrupt.

I2C3_EV 

I2C3 event interrupt.

I2C3_ER 

I2C3 error interrupt.

OTG_HS_EP1_OUT 

USB OTG HS End Point 1 Out global interrupt.

OTG_HS_EP1_IN 

USB OTG HS End Point 1 In global interrupt.

OTG_HS_WKUP 

USB OTG HS Wakeup through EXTI interrupt.

OTG_HS 

USB OTG HS global interrupt.

DCMI_PSSI 

DCMI/PSSI global interrupt.

CRYP 

CRYP crypto global interrupt.

HASH_RNG 

Hash and RNG global interrupt.

FPU 

FPU global interrupt.

UART7 

UART7 global interrupt.

UART8 

UART8 global interrupt.

SPI4 

SPI4 global Interrupt.

SPI5 

SPI5 global Interrupt.

SPI6 

SPI6 global Interrupt.

SAI1 

SAI1 global Interrupt.

LTDC 

LTDC global Interrupt.

LTDC_ERR 

LTDC Error global Interrupt.

DMA2D 

DMA2D global Interrupt.

OCTOSPI1 

OCTOSPI1 global interrupt.

LP_TIM1 

LP TIM1 interrupt.

CEC 

HDMI-CEC global Interrupt.

I2C4_EV 

I2C4 Event Interrupt.

I2C4_ER 

I2C4 Error Interrupt.

SPDIF_RX 

SPDIF-RX global Interrupt.

DMAMUX1_OV 

DMAMUX1 overrun interrupt.

DFSDM1_FLT0 

DFSDM1 filter 0 interrupt.

DFSDM1_FLT1 

DFSDM1 filter 1 interrupt.

DFSDM1_FLT2 

DFSDM1 filter 2 interrupt.

DFSDM1_FLT3 

DFSDM1 filter 3 interrupt.

SWPMI1 

SWPMI global interrupt OR Slave Resume asynchronous interrupt.

TIM15 

TIM15 global interrupt.

TIM16 

TIM16 global interrupt.

TIM17 

TIM17 global interrupt.

MDIOS_WKUP 

MDIOS wakeup interrupt through EXTI line.

MDIOS 

MDIO global interrupt.

MDMA 

MDMA global interrupt.

SDMMC2 

SDMMC2 global interrupt.

HSEM0 

HSEM global interrupt 1.

ADC3 

ADC3 global interrupt.

DMAMUX2_OVR 

DMAMUX2 overrun interrupt.

BDMA_CH0 

BDMA channel 0 interrupt.

BDMA_CH1 

BDMA channel 1 interrupt.

BDMA_CH2 

BDMA channel 2 interrupt.

BDMA_CH3 

BDMA channel 3 interrupt.

BDMA_CH4 

BDMA channel 4 interrupt.

BDMA_CH5 

BDMA channel 5 interrupt.

BDMA_CH6 

BDMA channel 6 interrupt.

BDMA_CH7 

BDMA channel 7 interrupt.

COMP 

COMP1 and COMP2 global interrupt.

LPTIM2 

LPTIM2 global interrupt.

LPTIM3 

LPTIM3 global interrupt.

LPTIM4 

LPTIM4 global interrupt.

LPTIM5 

LPTIM5 global interrupt.

LPUART 

LPUART1 global interrupt.

CRS 

Clock recovery global interrupt.

ECC_DIAG_IT 

ECC diagnostic global interrupt.

SAI4 

SAI4 global interrupt.

TEMP_IT 

Temperature sensor global interrupt.

WKUP 

Interrupt for 4 wakeup pins (1, 2, 4, 6) through EXTI line.

OCTOSPI2 

OCTOSPI2 global interrupt.

OTFDEC1 

OTFDEC1 interrupt.

OTFDEC2 

OTFDEC2 interrupt.

FMAC 

FMAC interrupt.

CORDIC_IT 

CORDIC interrupt.

UART9_IT_OR_UART9_WKUP 

UART9 interrupt.

USART10 

USART10 interrupt.

I2C5_EV 

I2C5 event interrupt.

I2C5_ER 

I2C5 error interrupt.

FDCAN3_IT0 

FDCAN3 interrupt line 0.

FDCAN3_IT1 

FDCAN3 interrupt line 1.

TIM23 

TIM23 global interrupt.

TIM24 

TIM24 global interrupt.

◆ IrqPriority

enum imt::base::hal::stm32h730::peripherals::NVIC::IrqPriority
strong

STM32H730 has 4 priority bits (=0xF = 16 priorities)

Note
highest priority has lowest value
Enumerator
Priority0 

Interrupt Priorty 0.

Priority1 

Interrupt Priorty 1.

Priority2 

Interrupt Priorty 2.

Priority3 

Interrupt Priorty 3.

Priority4 

Interrupt Priorty 4.

Priority5 

Interrupt Priorty 5.

Priority6 

Interrupt Priorty 6.

Priority7 

Interrupt Priorty 7.

Priority8 

Interrupt Priorty 8.

Priority9 

Interrupt Priorty 9.

Priority10 

Interrupt Priorty 10.

Priority11 

Interrupt Priorty 11.

Priority12 

Interrupt Priorty 12.

Priority13 

Interrupt Priorty 13.

Priority14 

Interrupt Priorty 14.

Priority15 

Interrupt Priorty 15.

Member Function Documentation

◆ disableIrq()

static void imt::base::hal::stm32h730::peripherals::NVIC::disableIrq ( const Irq  irq)
static

Disables the device-specific interrupt in the NVIC interrupt controller.

Parameters
irqexternal interrupt number, it cannot be negative

◆ enableIrq()

static void imt::base::hal::stm32h730::peripherals::NVIC::enableIrq ( const Irq  irq)
static

Enables the device-specific interrupt in the NVIC interrupt controller.

Parameters
irqexternal interrupt number, it cannot be negative

◆ generateSystemReset()

static void imt::base::hal::stm32h730::peripherals::NVIC::generateSystemReset ( void  )
static

Generates a system reset.

Note
: This function will not return!

◆ setPriority()

static void imt::base::hal::stm32h730::peripherals::NVIC::setPriority ( const Irq  irq,
const IrqPriority  priority 
)
static

The function sets the priority of an interrupt.

Parameters
irqexternal interrupt number
priorityThe preemption priority for the IRQ

◆ setPriorityGrouping()

static void imt::base::hal::stm32h730::peripherals::NVIC::setPriorityGrouping ( const uint32_t  group)
static

Sets the priority grouping field (preemption priority and subpriority) using the required unlock sequence.

Reference: ST_CortexM7_STM32H730_TRM_Rev2.pdf

Note
When the PriorityGroup_0 is selected, IRQ preemption is no more possible. The pending IRQ priority will be managed only by the subpriority.
Parameters
grouppriority grouping
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