Imt.Base C++ API V4.1.1.0
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ADCCommonRegisters.h
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1// (c) IMT - Information Management Technology AG, CH-9470 Buchs, www.imt.ch.
2
3#ifndef STM32F767_ADCCOMMONREGISTERS_H
4#define STM32F767_ADCCOMMONREGISTERS_H
5
8
9namespace imt {
10namespace base {
11namespace hal {
12namespace stm32f767 {
13namespace registers {
14
22
26 struct ADC_CSR {
27 uint32_t volatile AWD1 : 1;
28 uint32_t volatile EOC1 : 1;
29 uint32_t volatile JEOC : 1;
30 uint32_t volatile JSTRT1 : 1;
31 uint32_t volatile STRT1 : 1;
32 uint32_t volatile OVR1 : 1;
34 uint32_t volatile AWD2 : 1;
35 uint32_t volatile EOC2 : 1;
36 uint32_t volatile JEOC2 : 1;
37 uint32_t volatile JSTRT2 : 1;
38 uint32_t volatile STRT2 : 1;
39 uint32_t volatile OVR2 : 1;
40 uint32_t volatile : 2;
41 uint32_t volatile AWD3 : 1;
42 uint32_t volatile EOC3 : 1;
43 uint32_t volatile JEOC3 : 1;
44 uint32_t volatile JSTRT3 : 1;
45 uint32_t volatile STRT3 : 1;
46 uint32_t volatile OVR3 : 1;
47 uint32_t volatile : 10;
48 };
49
53 struct ADC_CCR {
54 uint32_t volatile MULTI : 5;
56 uint32_t volatile DELAY : 4;
57 uint32_t volatile : 1;
58 uint32_t volatile DDS : 1;
59 uint32_t volatile DMA : 2;
60 uint32_t volatile ADCPRE : 2;
61 uint32_t volatile : 4;
62 uint32_t volatile VBATE : 1;
63 uint32_t volatile TSVREFE : 1;
64 uint32_t volatile : 8;
65 };
66
70 struct ADC_CDR {
71 uint32_t volatile DATA1 : 16;
72 uint32_t volatile DATA2 : 16;
73 };
74
79 return *reinterpret_cast<ADCCommonRegisters*>(SystemMemoryMap::ADCCOMMON_BASE);
80 }
81
82 volatile ADC_CSR CSR; // Offset 0x00
83 volatile ADC_CCR CCR; // Offset 0x04
84 volatile ADC_CDR CDR; // Offset 0x08
85
86private:
87
92
97
101 ADCCommonRegisters& operator=(ADCCommonRegisters const& other);
102};
103
104} // namespace registers
105} // namespace stm32f767
106} // namespace hal
107} // namespace base
108} // namespace imt
109
110#endif // STM32F767_ADCCOMMONREGISTERS_H
This is a application specific file which is used to configure Imt.Base.Core.Math.
unsigned __int32 uint32_t
Definition stdint.h:64
ADC common control register (ADC_CCR), chapter 15.13.16.
uint32_t volatile DELAY
Delay between 2 sampling phases.
uint32_t volatile TSVREFE
Temperature sensor and VREFINT enable.
uint32_t volatile DDS
DMA disable selection (for multi-ADC mode).
uint32_t volatile DMA
Direct memory access mode for multi ADC mode.
ADC common regular data register for dual and triple modes (ADC_CDR), chapter 15.13....
uint32_t volatile DATA1
1st data item of a pair of regular conversions
uint32_t volatile DATA2
2nd data item of a pair of regular conversions
ADC Common status register (ADC_CSR), chapter 15.13.15.
uint32_t volatile JEOC3
Injected channel end of conversion of ADC3.
uint32_t volatile JEOC
Injected channel end of conversion of ADC1.
uint32_t volatile STRT3
Regular channel Start flag of ADC3.
uint32_t volatile JEOC2
Injected channel end of conversion of ADC2.
uint32_t volatile JSTRT3
Injected channel Start flag of ADC3.
uint32_t volatile JSTRT1
Injected channel Start flag of ADC1.
uint32_t volatile JSTRT2
Injected channel Start flag of ADC2.
uint32_t volatile STRT1
Regular channel Start flag of ADC1.
uint32_t volatile STRT2
Regular channel Start flag of ADC2.
ADC Common module (ADCCOMMON) register structure.
static ADCCommonRegisters & getInstance()
Gets the instance of the registers for a given ADC module in memory.