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Imt.Base C++ API V4.1.1.0
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SRAM/NOR-Flash chip-select control registers 1..4 (FMC_BCR1..4), chapter 13.5.6. More...
#include <Imt.Base.HAL.STM32F767/Registers/FMCRegisters.h>
Public Attributes | |
| uint32_t volatile | MBKEN: 1 |
| Memory bank enable bit. | |
| uint32_t volatile | MUXEN: 1 |
| Address/data multiplexing enable bit. | |
| uint32_t volatile | MTYP: 2 |
| Memory type. | |
| uint32_t volatile | MWID: 2 |
| Memory data bus width. | |
| uint32_t volatile | FACCEN: 1 |
| Flash access enable. | |
| uint32_t | volatile: 1 |
| uint32_t volatile | BURSTEN: 1 |
| Burst enable bit. | |
| uint32_t volatile | WAITPOL: 1 |
| Wait signal polarity bit. | |
| uint32_t volatile | WAITCFG: 1 |
| Wait timing configuration. | |
| uint32_t volatile | WREN: 1 |
| Write enable bit. | |
| uint32_t volatile | WAITEN: 1 |
| Wait enable bit. | |
| uint32_t volatile | EXTMOD: 1 |
| Extended mode enable. | |
| uint32_t volatile | ASYNCWAIT: 1 |
| Wait signal during asynchronous transfers. | |
| uint32_t volatile | CPSIZE: 3 |
| CRAM page size. | |
| uint32_t volatile | CBURSTRW: 1 |
| Write burst enable. | |
| uint32_t volatile | CCLKEN: 1 |
| Continuous Clock Enable. | |
| uint32_t volatile | WFDIS: 1 |
| Write FIFO Disable. | |
SRAM/NOR-Flash chip-select control registers 1..4 (FMC_BCR1..4), chapter 13.5.6.
Definition at line 26 of file FMCRegisters.h.
Wait signal during asynchronous transfers.
Definition at line 40 of file FMCRegisters.h.
Burst enable bit.
Definition at line 33 of file FMCRegisters.h.
Write burst enable.
Definition at line 42 of file FMCRegisters.h.
Continuous Clock Enable.
Definition at line 43 of file FMCRegisters.h.
CRAM page size.
Definition at line 41 of file FMCRegisters.h.
Extended mode enable.
Definition at line 39 of file FMCRegisters.h.
Flash access enable.
Definition at line 31 of file FMCRegisters.h.
Memory bank enable bit.
Definition at line 27 of file FMCRegisters.h.
Memory type.
Definition at line 29 of file FMCRegisters.h.
Address/data multiplexing enable bit.
Definition at line 28 of file FMCRegisters.h.
Memory data bus width.
Definition at line 30 of file FMCRegisters.h.
| uint32_t imt::base::hal::stm32f767::registers::FMCRegisters::FMC_BCR::volatile |
Definition at line 32 of file FMCRegisters.h.
Wait timing configuration.
Definition at line 36 of file FMCRegisters.h.
Wait enable bit.
Definition at line 38 of file FMCRegisters.h.
Wait signal polarity bit.
Definition at line 34 of file FMCRegisters.h.
Write FIFO Disable.
Definition at line 44 of file FMCRegisters.h.
Write enable bit.
Definition at line 37 of file FMCRegisters.h.