imt::base::hal::stm32h730::registers::OSPIRegisters::OCTOSPI_WTCR Struct Reference

OCTOSPI write timing configuration register (OCTOSPI_WTCR), chapter 25.6.24. More...

#include <Imt.Base.HAL.STM32H730/Registers/OSPIRegisters.h>

Public Attributes
uint32_t volatile	DCYC: 5
	Number of dummy cycles.
uint32_t	volatile: 27

Detailed Description

OCTOSPI write timing configuration register (OCTOSPI_WTCR), chapter 25.6.24.

Definition at line 299 of file OSPIRegisters.h.

Member Data Documentation

DCYC

uint32_t volatile imt::base::hal::stm32h730::registers::OSPIRegisters::OCTOSPI_WTCR::DCYC

Number of dummy cycles.

Definition at line 300 of file OSPIRegisters.h.

volatile

uint32_t imt::base::hal::stm32h730::registers::OSPIRegisters::OCTOSPI_WTCR::volatile

• reserved

Definition at line 301 of file OSPIRegisters.h.

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The documentation for this struct was generated from the following file:

• C:/src/imt/Imt.Base-cpp/Imt.Base/Imt.Base.HAL.STM32H730/Registers/OSPIRegisters.h